









One of the most commonly used ports at all. Many extensions like parallel floppy speeders, eprommers, relay cards, etc. connect to the user port. Please note that the SX-64's user port seems to be slightly INCOMPATIBLE which means that certain user port devices can cause DAMAGE! See description of pin 10-11.
ASCII version:
      1   2   3   4   5   6   7   8   9   10  11  12
  +--===+===-===-===-===-===-===-===-===-===+===-===--+
  |     |                                   |         |
  +--===+===-===-===-===-===-===-===-===-===+===-===--+
      A   B   C   D   E   F   H   J   K   L   M   N
| Pin(s) | Signal | Dir | Description | 
|---|---|---|---|
| 1 | GND | - | Ground (0V). | 
| 2 | +5V DC | - | Supply voltage. Max. 100mA. | 
| 3 | /RESET | in/out | RESET. When pulling this line to LOW, the CPU resets and waits for a LOW-HIGH transistion to load the PC with the value stored in $fffc/$fffd. After power-up, timer A in the NE556 pulls this line to LOW for a short time and half a second later back to HIGH. | 
| 4 | CNT1 | progr. | Count1. Connected to CNT of CIA #1. | 
| 5 | SP1 | progr. | Serial port 1. Serial I/O of shift register (SP) of CIA #1. | 
| 6 | CNT2 | progr. | Count2. Connected to CNT of CIA #2. | 
| 7 | SP2 | progr. | Serial port 2. Serial I/O of shift register (SP) of CIA #2. | 
| 8 | /PC2 | out | Port control 2. Connected to /PC of CIA #2. Becomes LOW for one cycle after read or write access of port register B. Open collector output, therefore needs pull-up resistor. | 
| 9 | SER ATN | out | Serial attention. Attention line of serial bus. Can be used as output (inverted PA3 of CIA #2) and via open-collector ouput as input, too (have to verify that). | 
| 10-11 | 9 VAC | - | Supply voltage. Max. 100mA. WARNING! It is said that one of the pins is GROUNDED in the SX-64! This means for example that you cannot use your Commodore Vicmodem, because it will damage your SX-64! [2] | 
| 12 | GND | - | Ground (0V). | 
| A | GND | - | Ground (0V). | 
| B | /FLAG2 | in | A negative edge at this pin sets the FLAG bit in the interrupt control register of CIA #2. | 
| C-L | PB0-PB7 | progr. | Port register B of CIA #2. Each line is individually programmable as in- or output. | 
| M | PA2 | progr. | Port register A, bit 2 of CIA #2. | 
| N | GND | - | Ground (0V). | 
Note: All pictures show the plug side.