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CPU 6502

Employed in: VIC-20, 1541, 1570/71, 1581

The 6502 CPU (Central Processing Unit) (or MPU (Micro Processing Unit?)) is an 8-bit processor for the VIC-20, and many of the Commodore floppy drives.

Technical data

Links: 6502/6510 instruction set * Illegal opcodes 


Pinout
[Pinout of 6510]

Fig. 1: 6502 




Signal Description
(Click here 
for ASCII version)




  
  

    Pin(s) 
    Signal 
    Dir 
    Description 
  

    1
    GND 
    - 
    GrouND. (0V) 
  

    2
    RDY
    in 
    ReaDY. When going LOW, the CPU waits after 
      next read cycle for this line going HIGH again. 
  

    3
    ø1 out* 
    out 
    Phi1 out. [Help! Why does the 
      6502 have TWO system clock ouputs? ] 
  

    4
    /IRQ
    in 
    Interrupt ReQuest. When going LOW, the 
      CPU loads the PC with the value stored in $fffe/$ffff after 
      processing the current command. This procedure will be executed only when 
      interrupts have been enabled (bit 2 in flag register = 0). 
  

    5
    NC
    - 
    Not Connected. 
  

    6
    /NMI
    in 
    Non Maskable Interrupt. When going 
      LOW, the CPU loads the PC with the value stored in $fffa/$fffb 
      after processing the current command. 
  

    7
    Sync
    out 
    Synchronization. Becomes HIGH whenever the CPU fetches an 
      opcode. Together with pin 2 (RDY), you can build a single step mode 
      hardwarewise [2]. 

  

    8
    Vcc 
    - 
    Supply voltage. This pin is connected to +5V DC. 
  

    9-20
    A0-A11 
    in / out 
    Address bus. The CPU applies the address of the next 
      datum to be read or written. 
  

    21
    GND 
    - 
    GrouND. (0V) 
  

    22-25
    A12-A15 
    in / out 
    Address bus. The CPU applies the address of the next 
      datum to be read or written. 
  

    26-33
    D7-D0 
    in / out 
    Data bus. 
  

    34
    R/-W 
    out 
    Read/-Write. With this line, the CPU controls 
      whether the next DRAM access will be a read or write cycle. LOW=write, 
      HIGH=read. 
  

    35
    NC
    - 
    Not Connected. 
  

    36
    NC
    - 
    Not Connected. 
  

    37
    ø 0 in* 
    in 
    Phi 0 in. The system clock signal is applied to this input. 
      In the VIC-20 and the 1541, 
      it is about 1 MHz. 
  

    38
    /s o
    in 
    Set Overflow. Pulling this pin to LOW sets 
      the overflow flag in the status register [1]. 

  

    39
    ø2 out* 
    out 
    Phi2 out. The CPU outputs the system clock for the rest of 
      the chips for synchronization. Don't know why there are TWO system clock 
      outputs (see pin 3). 
  

    40
    /RES
    in 
    RESet. When going LOW, the CPU resets and waits for 
      a LOW-HIGH transistion to load the PC with the value stored in 
      $fffc/$fffd. 

* The 
'ø' is used as Greek 'phi' here. 



Programming info

On http://www.funet.fi/pub/cbm, you can 
find the 6502/6510 instruction set as well as the Illegal opcodes. 




[1] I haven't verified that, [2] 
states that it is an active high OUTPUT (overflow flag set -> SO = 
HIGH).
[2] 64'er Hardware-Buch, p.209/210, ISBN 
3-87791-249-4





Updated: February 6th, 
1998
Created: February 6th, 1998
Status : 
NOT VERIFIED!






  Site copyright © 1997 by Marc-Jano Knopp



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