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VIA 6522

Employed in: 1541, 1570/71, CBM 8000 series

The VIA (Versatile Interface Adapter) is a peripheral IC which is used in the 1541 for controlling the serial bus and the stepper motor, among other things.

Technical Data


Links: 6522 data sheet >

Pinout

[Picture of 6522]
Fig. 1: VIA

Signal Description

(Click here for ASCII version)

Pin(s) Signal Dir Description
1GND- Ground (0V).
2-9PA0-PA7progr. Port A 0-7. Port A of the VIA #1 in the 1541 is not used so that you can connect a parallel cable here for speeding up floppy operations. Some modifications are needed for the 1541c and 1541-II, though.
10-17PB0-PB7progr. Port B 0-7.
18CB 1in/out Control port B 1. When configured as input, it can be used to trigger interrupts.
19CB 2in/out Control port B 2. When configured as input, it can be used to trigger interrupts.
20Vcc - Supply voltage (+5V DC).
21/IRQout Interrupt ReQuest. In the 1541, this line is connected to the /IRQ input of the 6502.
22R/-Win Read/-Write. 0=read on data bus, 1=write on data bus.
23/CS 2in Chip Select 2. CS2=0 AND CS1=1 = coupled to data bus, 1=tri-state.
24CS 1in Chip Select 1. In the 1541, this line is directly connected to +5V DC.
25ø 2* in Phi 2. System clock signal. All data bus action takes place only when ø2=1.
26-33DB7-DB0in/out Data bus.
34/RESin RESet. 0=reset the VIA to initial state.
35-38RS3-RS0in Register Select. These four pins select on of the VIA's internal registers. In the 1541, they are connected to A3-A0 of the address bus.
39CA 2in/out Control port A 2.
40CA 1in/out Control port A 1.

* The 'ø' is used as Greek 'phi' here.
progr. = programmable

Technical info

The pin assignment for both VIAs in the 1570/71 is as follows:
VIA #1
  Pin | Dir | Function
  ----+-----+------------------------------
  PB0 | in  | DATA input from serial bus
  PB1 | out | DATA output to serial bus
  PB2 | in  | CLOCK input from serial bus
  PB3 | out | CLOCK output to serial bus
  PB4 | out |  0 = ATN will be acknowledged automatically
      |     |  1 = ATN produces no auto-ACK
  PB5 | in  | DIP switch 1 (left) or jumper
  PB6 | in  | DIP switch 2 (right) or jumper
  PB7 | in  | ATN signal from serial bus

  PA0 | in  | State of track-0 light barrier:
      |     |  0 = head is over track 0
      |     |  1 = head is not over track 0 
  PA1 | out | 1570/71 bus data direction:
      |     |  0 = input
      |     |  1 = output
  PA2 | out | head active (1571 only)
  PA5 | out | Floppy mode and CPU frequency:
      |     |  0 = 1541 mode with 1 Mhz clock
      |     |  1 = 1571 mode with 2 Mhz clock
  PA7 | in  | BYTE-READY signal

VIA #2
  Pin | Dir  | Function
  ----+------+---------------------------------------------
  PB0 | out  | STP1 - 2nd bit of stepper control
  PB1 | out  | STP0 - 1st bit of stepper control
  PB2 | out  |  0 = motor off, 1 = motor on
  PB3 | out  |  0 = LED off, 1 = LED on
  PB4 | in   | Write protection:
      |      |  0 = on, 1 = off
  PB5 | out  | DS0 (see DS1)
  PB6 | out  | DS1. Density Select. DS0 and DS1 control
      |      | the recording rate on the disk.
  PB7 | in   |  1 = sync mark occurred.

  PA  |in/out| data for read/write electronics


[1] 64'er Hardware-Buch, ISBN 3-87791-249-4
[2] Commodore 1571 & 1570: Das große Floppy-buch, ISBN 3-89011-124-6


Updated: January 23rd, 1998
Created: 1997
Status : NOT VERIFIED!

Site copyright © 1997 by Marc-Jano Knopp
This document is part of MJK's Commodore 64 & LCD Page
Brought back to life by Peter Schepers, Dec 10, 2005 because I really liked this site!