The ACIA (Asynchronous Communications Adapter) is used in the Plus/4 to implement the RS232 interface, which now can handle up to 19,200 bps.
Technical Data
+-----__-----+
Vss -| 1 28 |- R/-W
CS0 -| 2 27 |- PHI2
/CS1 -| 3 26 |- /IRQ
/RES -| 4 25 |- DB7
RXC -| 5 24 |- DB6
XTAL1 -| 6 23 |- DB5
XTAL2 -| 7 22 |- DB4
/RTS -| 8 21 |- DB3
/CTS -| 9 20 |- DB2
/TXD -| 10 19 |- DB1
/DTR -| 11 18 |- DB0
RXD -| 12 17 |- /DSR
RS0 -| 13 16 |- /DCD
RS1 -| 14 15 |- Vdd
+------------+
Fig. 1: ACIA
| Pin(s) | Signal | Dir | Description |
|---|---|---|---|
| 1 | Vss | - | Ground (0V). |
| 2 | CS0 | in | Chip Select 2. CS0=1 AND CS1=0 = coupled to data bus, otherwise tri-state. |
| 3 | /CS1 | in | Chip Select 1. |
| 4 | /RES | in | Reset. 0=reset the ACIA to initial state. |
| 5 | RXC | in / out or progr.? | Receive Clock. This pin can be configured to be either an input for the 16fold of the baud rate or to ouput the same(?). |
| 6 | XTAL1 | in | Crystal 1. Usually, the 6551 is operated with a 1.8432 MHz crystal between XTAL1 and XTAL2. Additionally, a 30 pF capacitor should be connected between pin 7 and GND (Vss). |
| 7 | XTAL2 | in | Crystal 2. |
| 8 | /RTS | out | Request To Send. Switches the transceiver of an attached modem on, thus telling it to get ready to receive data from the computer. |
| 9 | /CTS | in | Clear To Send. The modem indicates that it is ready, usually upon an RTS from the computer. |
| 10 | /TXD | out | Transfer Data. |
| 11 | /DTR | out | Data Terminal Ready. Signal for attached modem that ACIA/computer is ready. |
| 12 | /RXD | in | Receive Data. |
| 13-14 | RS0-RS1 | in | Register select. These two pins select one of the ACIA's internal registers and are usually connected with A0 and A1 of the address bus. |
| 15 | Vdd | - | Supply voltage. +5V DC. |
| 16 | /DCD | in | Data Carrier Detect. The modem tells the ACIA if it receives a carrier on the phone line. DCD stays active during the entire connection. On half duplex modems, only the receiving modem activates this line. |
| 17 | /DSR | in | Data Set Ready. The modem tells the ACIA that the preparation for connecting with the target is finished and it is ready to communicate with the ACIA. With most modems, this line is always active ( = LOW), so that this line can only be used to determine if the modem is switched on. |
| 18-25 | DB0-DB7 | in/out | Data bus. |
| 26 | /IRQ | out | Interrupt ReQuest. |
| 27 | ø 2* | in | Phi 2. System clock signal. Used for bus synchronization (not for baud rate!) |
| 28 | R/-W | in | Read/-Write. 0=read registers, 1=write registers. |
Adr. | Read | Write -----+-------------------+------------------ 0 | received data | transceived data 1 | status register | reset command 2 | command register | command register 3 | control register | control register
Bit 7 6 5 configuration
x x 0 no parity bit
0 0 1 send and receive with odd parity
0 1 1 send and receive with even parity
1 0 1 send: parity=1; receive: parity not evaluated
1 1 1 send: parity=0; receive: parity not evaluated
Bit 4 0: no echo
1: echo (received characters are being sent again,
bits 2 and 3 must be 0 for that)
Bit 3 2 sender interr. RTS level sender
0 0 no high off
0 1 yes low on
1 0 no low on
1 1 no low send BRK
Bit 1 0: interrupt gets triggered by bit 3 in status register
1: no interrupt
Bit 0 0: disable transceiver and interrupts, /DTR high
1: enable transceiver and interrupts, /DTR low
Bit 7 0: 1 stop bit
1: a) with 8 data bits and 1 parity bit: 1 stop bit
b) with 5 data bits and no parity bit: 1.5 stop bits
c) otherwise 2 stop bits
Bit 6 5 data bits
0 0 8
0 1 7
1 0 6
1 1 5
Bit 4 0: external receive clock
1: builtin clock as receive clock
Bit 3 2 1 0 baud rate
0 0 0 0 1/16 times external clock
0 0 0 1 50 bps
0 0 1 0 75 bps
0 0 1 1 109.92 bps
0 1 0 0 134.58 bps
0 1 0 1 150 bps
0 1 1 0 300 bps
0 1 1 1 600 bps
1 0 0 0 1200 bps
1 0 0 1 1800 bps
1 0 1 0 2400 bps
1 0 1 1 3600 bps
1 1 0 0 4800 bps
1 1 0 1 7200 bps
1 1 1 0 9600 bps
1 1 1 1 19200 bps
Bit set (=1) unset (=0) 7 parity error auto 6 frame error auto 5 overrun error auto 4 received word reading receive data register 3 send data sent writing in send data register 2 state of DCD - 1 state of DSR - 0 interrupt reading status register